Simulation and Analysis of Multilevel Inverters for 3-Phase Motor Speed Control

I. INTRODUCTION

Multilevel inverters include an array of power semiconductors and capacitor voltage sources, the output of which generate voltages with stepped waveforms. The term multilevel starts with the three-level inverter introduced by Muhammad, et. al. (2017). By increasing the number of levels in the inverter, the output voltages have more steps that is, a staircase waveform, with reduced harmonic distortions. A multilevel inverter has several advantages over a conventional two-level inverter that uses high switching frequency pulse width modulation (PWM). The main attractive features of a multilevel inverter are (Muhammad, et. al., 2017) : 1) Low dv/dt stress: Multilevel inverters not only can generate the output voltages with very low distortion but also can reduce the dv/dt stresses. 2) Common-mode (CM) voltage: Multilevel inverters produce smaller CM voltage; therefore, the stress in the bearings of a motor connected to a multilevel motor drive can be reduced. 3) Input current: Multilevel inverters can draw input current with low distortion. 4) Switching frequency: Multilevel inverters can operate at both fundamental frequency and high switching frequency PWM. It should be noted that lower switching frequency usually means lower switching loss and higher efficiency. Multilevel inverters do have some disadvantages. One being the requirement of many power semiconductor switches. Also each switch requires a related gate drive circuit. This may cause an increase in overall expenses of the system.

Multilevel inverters can be mainly divided into three major types:

This structure is known as neutral-point clamped (NPC) and is widely used in medium voltage, high power drives.

d) Cascade h-bridge multilevel inverter: A structure of an m-level cascaded inverter is shown in Fig.1. Each separate dc source (SDCS) is connected to a H bridge inverter. The number of output phase voltage levels, m, is given by m = 2s+ 1 , where s is the number of separate dc sources (Atkar, et. al., 2016). Cascaded inverters have been used for such applications as static var generation, with renewable energy sources, and in battery-based applications. The main advantages and disadvantages can be listed as (Siksha, 2015):-

The based PWM Techniques for cascade multilevel inverter can be broadly classified into:-phase shifted modulation and level shifted modulation (Lekha, 2013). In to both techniques, for an m level inverter, (m-1) triangular carrier waves are required. And all the carrier waves should have the same frequency and the same peak to peak magnitude. shifted of Φcr between the adjacent carrier signals. The phase shifted is given by for a three phase inverter, the modulating signals should also be three phase sinusoidal signals with adjustable magnitude and frequency. For this modulation scheme, the frequency modulation index mf and the amplitude modulation index ma is given by- where fcr and fm is the frequency of the carrier and the modulating signals respectively and vcr and vmA are the peak amplitudes of the carrier and the modulating signals respectively. The amplitude modulation lies in the range of 0 to 1. The switching frequency of the device can be calculated as fdev = fcr = fm ×mf . the switching frequency of the inverter can be found from the device switching frequency ass finv=(m-1) i.e. 4 number of carrier waves of the same Frequency and having the same peak to peak magnitude as shown in fig 2.

b) level shifted multicarrier modulation In level shifted PWM (LS-PWM), the triangular waves are vertically displaced such that the bands occupy are contiguous. The frequency modulation is given by mf =fcr/fm and amplitude modulation index is ma = v ma / (m-1)vcr, where fm and fcr are the frequencies of the modulating and carrier waves and vma and vcr are the peak amplitude of modulating and carrier waves respectively. The amplitude modulation lies in the range of 0 to 1. Depending upon the disposition of the carrier waves, level shifted PWM can be in phase

i) IPD-PWM:- In this modulation, all the triangular carrier wave are in phase As shown in fig 3.

ii) POD-PWM:- The carrier waveforms are in all phase above and below the zero reference value; however there is 1800 phase shift between the ones above and below zero respectively as shown in fig 4.

iii) APOD-PWM:- The carrier waves have to be displaced from each other by 1800 alternately as shown in fig 3.4. In this modulation, the inverter switching frequency and the device switching frequency is given by finv = fcr and fdev = fcr/(m-1) respectively.

In LS-PWM, each carrier is associated with the gating signals of NPC converter whereas in PS-PWM, a pair of carriers is associated with each cell of the CHB and FC converters. Because of the phase shifting of the carriers, power is evenly distributed among the cells which results in the smooth operation of CHB and the natural voltage though IPD-PWM results in low THD as compared to PS-PWM, the small difference in the high frequency content can be filtered out (Khoucha, et. al., 2010).

IV. SIMULATION AND ANALYSIS

The usual technique of overcoming such problems in voltage source inverters is to pulse width modulate the input voltage waveforms. Pulse width modulated voltage source inverters are invariably used for AC/DC/AC conversion to provide a variable ac voltages to the induction motor. However, inverter fed induction motor suffers from the presence of significant amount of harmonics which causes undesired motor heating, torque pulsation and electro-magnetic interference. In order to reduce the harmonics, large sized filters are needed, which results in larger size and increased cost of the system. However the advanced achievements in the field of industrial electronics and power electronics made possible to reduce the magnitude of harmonics using multilevel inverter structures, in which the number of output voltage and current waveforms are increased without increasing the size of the filter.

The proposed three-phase MLI fed to the BLDC motor is shown in Fig.14. This model represents modeling three-phase, three-level inverter. The 12-inverter pulses required by the inverter are generated by the discrete three-phase PWM generator. The system operates in open loop at a constant modulation index. The inverter is built with individual IGBTs and diodes. In a three-level voltage-sourced converter (VSC) using ideal switches, the two pairs of pulses sent to each arm could be complementary. For example, for phase A, IGBT1 is complementary of IGBT3 and IGBT2 is complementary of IGBT4.

V. CONCLUSION

Various Multilevel inverter topologies were studied using simulation results. The three level, seven level cascaded H-bridge inverters were simulated in MATLAB-Simulink environment. Two types of Multicarrier Pulse Width Modulation – Level Shifted Modulation and Phase Shifted Modulation were implemented for the cascaded multilevel inverter. It was found that the cascaded h bridge inverter configuration gave sinusoidal output waveform. This converter system can meet the power or voltage requirement of the traction drive. The cascaded eleven level converter system modeled in this project can be used in traction drive consisting of four induction motors for stepping down the catenary voltage to the rated voltage of the induction motors. The Matlab Simulation of Multilevel inverter for I.M Speed control and BLDC motor speed control is done successfully as shown in the simulation results.

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PG Student, EE Department, LDRP-ITR, Gandhinagar, Gujarat, India mkpatel9027@gmail.com