Study of Different Analog Circuits In Udsm (Ultra Deep-Submicron Cmos)
Challenges and Solutions in Analog Circuit Design in Modern UDSM Technologies
Keywords:
analog circuits, UDSM, ultra-deep-submicron, CMOS, nonlinear output conductance, voltage gain, gate-leakage mismatch, matching tolerances, area, power consumption, active cancellation techniques, supply voltages, thin- and thick-oxide transistors, composite transistors, practical rules of thumb, measurementsAbstract
Modern and future ultra-deep-submicron (UDSM)technologies introduce several new problems in analog design. Nonlinear outputconductance in combination with reduced voltage gain pose limits in linearityof (feedback) circuits. Gate-leakage mismatch exceeds conventional matchingtolerances. Increasing area does not improve matching anymore, except ifhigher power consumption is accepted or if active cancellation techniques areused. Another issue is the drop in supply voltages. Operating critical parts athigher supply voltages by exploiting combinations of thin- and thick-oxidetransistors can solve this problem. Composite transistors are presented to solvethis problem in a practical way. Practical rules of thumb based on measurementsare derived for the above phenomena.Downloads
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Published
2011-08-01
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