Design and Implementation of 8 Bit Barrel Shifter Using 2:1 Multiplexer in Verilog

Improving performance and power consumption of a multiplexer-based barrel shifter

Abstract

Barrel shifter is one of the most important data path elements and widely used in many key computer operations from address decoding to computer arithmetic, using basic operations like data shifting or rotation. In this paper multiplexer based barrel shifter circuit is implemented using the hardware description language “Verilog”. The proposed barrel shifter architecture implementation shows large reduction in propagation delay, while keeping the almost similar average power consumption.