Implementation of Riscprocessorusing Verilog: Design and Implementation of a 16 bit RISC Processor using Verilog

Abstract

RISC is a design philosophy to reduce the complexity of instruction set that in turn reduces the amount of space, cycle time, cost and other parameters taken into account during the implementation of the design. The intent of this paper is to design and implement 16 bit RISC processor using Project Navigator tool. This processor design depends upon design specification, analysis and simulation. It takes into consideration very simple instruction set. The momentous components include Control unit, ALU, shift registers, IDU, PC, Clock generation unit and accumulator register